This invention relates to an IC tester and an IC test method for determining whether or not a measured IC is good by conducting a frequency analysis of a power supply current.
In recent years, putting circuits used with various electronic machines into ICs (integrated circuits) has been proceeding rapidly. However, variations in characteristics of ICs to some extent easily occur at the mass production time and thus an IC tester for testing an IC is used. Known as one of the IC testers for testing ICs is an IC tester for conducting frequency analysis of a power supply current of an IC when a predetermined test pattern signal is input and determining whether or not the IC is good based on the analysis result, for example.
Such an IC tester for conducting a frequency analysis of a power supply current of an IC in a related art is made up of a control processor 1, a pattern generator 2, a voltage generation/current detection circuit 4, a sampling clock generation circuit 5, a flip-flop 6, an AND gate 7, an AD converter 8, a storage circuit 9, and a high-speed computation circuit 10, as shown in FIG. 2.
The control processor 1 sets a voltage value in the voltage generation/current detection circuit 4 and outputs pattern data to the pattern generator 2. It outputs a frequency control signal to the sampling clock generation circuit 5 and outputs a computation control signal to the high-speed computation circuit 10. The control processor 1 compares the frequency analysis result input from the high-speed computation circuit 10 with a predetermined standard value and determines whether or not a measured sample 3 is good.
The pattern generator 2 generates a digital pattern signal in accordance with the pattern data input from the control processor 1 and outputs the generated pattern signal to the measured sample 3. When the pattern generator 2 starts to generate the digital pattern signal, it outputs a pattern generation start signal to an S terminal of the flip-flop 6 for setting the flip-flop 6. Further, when the pattern generator 2 terminates generating the digital pattern signal, it outputs a pattern generation termination signal to an R terminal of the flip-flop 6 for resetting the flip-flop 6.
The measured sample 3 is an IC to be tested and when a power supply voltage is input from the voltage generation/current detection circuit 4 and the pattern signal is input from the pattern generator 2, the measured sample 3 outputs a current signal changed in response to the pattern signal to the voltage generation/current detection circuit 4.
The voltage generation/current detection circuit 4 applies the voltage set by the control processor 1 to a power terminal of the measured sample 3. It detects a current signal responsive to the power supply current flowing into the measured sample 3 and outputs the detected current signal to the AD converter 8.
When the pattern generation start signal is input to the S (Set) terminal of the flip-flop 6 from the pattern generator 2, the flip-flop 6 outputs xe2x80x9c1xe2x80x9d to the AND gate 7 and continues to output xe2x80x9c1xe2x80x9d until the pattern generation termination signal is input to the R (Reset) terminal. When the pattern generation termination signal is input to the R terminal from the pattern generator 2, the flip-flop 6 outputs xe2x80x9c0xe2x80x9d to the AND gate 7 and continues to output xe2x80x9c0xe2x80x9d until the pattern generation start signal is input to the S terminal. That is, while the pattern signal is input to the measured sample 3 from the pattern generator 2, the flip-flop 6 outputs xe2x80x9c1xe2x80x9d to the AND gate 7; otherwise the flip-flop 6 outputs xe2x80x9c0.xe2x80x9d
The sampling clock generation circuit 5 generates a clock signal of a frequency responsive to the frequency control signal from the control processor 1 and outputs the clock signal to the AND gate 7. The AND gate 7 outputs the clock signal input from the sampling clock generation circuit 5 to the AD converter 8 only while xe2x80x9c1xe2x80x9d is input from the flip-flop 6.
Only while the clock signal is input from the AND gate 7, the AD (Analog to Digital) converter 8 converts the current signal input from the voltage generation/current detection circuit 4 into a digital signal in synchronization with the clock signal, and outputs the electric current converted into the digital signal to the storage circuit 9.
The storage circuit 9 stores the current signal input from the AD converter 8 and outputs the current signal to the high-speed computation circuit 10, which then conducts a frequency analysis of the current signal input from the storage circuit 9 in accordance with the computation control signal input from the control processor 1 and outputs the analysis result to the control processor 1, which then determines whether or not the measured sample 3 is good based on the analysis result. That is, frequency analysis of the current signal detected by the voltage generation/current detection circuit 4 while the pattern signal is input to the measured sample 3 is conducted and whether or not the measured sample 3 is good is determined.
To detect minute current fluctuation with good accuracy and conduct a frequency analysis with the IC tester in the related art as shown in FIG. 2, the noise component superposed on the detected current signal must be removed. Thus, for example, the same pattern signal is input to the measured sample 3 repeatedly n times and the digital signal into which the current signal is converted by the AD converter 8 is stored in the storage circuit 9 each time, then the average value of n digital signals stored is calculated, whereby the noise component is removed and then a frequency analysis is conducted.
However, when the same pattern signal is input repeatedly, some measured samples 3 must be initialized each time one pattern signal is input, and a pattern for initializing the measured sample 3 must be contained in the beginning of the pattern signal in some cases. In these cases, the IC tester in the related art cannot conduct a frequency analysis of only the current signal responsive to the test pattern signal excluding the current signal responsive to the pattern signal for initializing the measured sample 3; this is a problem. Thus, with the IC tester in the related art, the test pattern signal input to the measured sample 3 must be changed.
For example, if the pattern signal must be changed for each of the circuit blocks making up the measured sample 3, the operation of inputting the pattern signal responsive to one circuit block to the measured sample 3, storing the current signal detected at the time in the storage circuit 9, and conducting a frequency analysis by the high-speed computation circuit 10 must be repeated for each circuit block.
Techniques for testing integrated circuits (ICs) using frequency analysis are disclosed.
According to one aspect, an IC test method uses frequency analysis of a power supply current fluctuating in response to a test pattern signal input to an IC. The method includes storing a start address and an end address of the test pattern signal input to the IC and storing only power supply current from the IC that is detected while the pattern specified by the start address and the end address is input to the IC. A frequency analysis of the stored power supply current is conducted and a determination is made as to whether or not the IC is good based on an analysis result of the frequency analysis.
Some implementations may include one or more of the following features. For example, an address signal of the test pattern signal input to the IC may be generated. Matches between the address signal and the start address and the end address may he detected so that only power supply current detected in a time interval from a time when the match between the address signal and the start address is detected until a time when the match between the address signal and the end address is detected. In some cases, multiple start addresses and end addresses may be stored.
An apparatus for implementing the foregoing techniques also is disclosed.
Therefore, if the pattern signal contains a plurality of pattern signal portions required for test, the plurality of pattern signal portions can be specified and the power supply currents of the IC based on the pattern signal portions required for test can be stored for conducting a frequency analysis.
Thus, for example, if the pattern signal must be changed for each of the circuit blocks making up the IC, the pattern signal containing all of the pattern signals responsive to the circuit blocks is input to the IC only once, whereby the power supply current responsive to the pattern signal varying from one circuit block to another can be stored in the storage circuit 9 and whether or not the IC is good can be determined based on the frequency analysis result, so that test can be carried out more easily without changing the pattern signal input to the IC.
For example, if a frequency analysis is conducted after the noise component of each power supply current is removed by detecting and averaging a plurality of power supply currents based on the same test pattern, one pattern signal comprising a plurality of patterns for initializing the IC and a plurality of patterns required for testing in succession is input to the IC only once, whereby a plurality of only power supply currents based on the test pattern portions can be stored, so that test can be carried out more easily without changing the pattern signal input to the IC.